发明名称 Wiring substrate and manufacturing method thereof, and semiconductor device
摘要 A wiring substrate includes a first insulation layer, a connection terminal, a second insulation layer, a via, and a wiring pattern. The connection terminal is disposed in the first insulation layer so as to be exposed from a first main surface of the first insulation layer, and is electrically connected with a semiconductor chip. The second insulation layer is disposed on a second main surface of the first insulation layer situated on the opposite side from the first main surface. The via is disposed in the second insulation layer, and is electrically connected with the connection terminal. The via is separated from the connection terminal. The wiring pattern is disposed on the second main surface of the first insulation layer and electrically connects the connection terminal and the via.
申请公布号 US7943863(B2) 申请公布日期 2011.05.17
申请号 US20070882198 申请日期 2007.07.31
申请人 SHINKO ELECTRIC INDUSTRIES CO., LTD. 发明人 NAKAMURA JUNICHI
分类号 H05K1/11 主分类号 H05K1/11
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