| 摘要 |
An apparatus and method for compensating for a phase jump of a reference signal in a digital Phase-Locked Loop (PLL)/Frequency-Locked Loop (FLL) are provided. The apparatus includes a phase discriminator for comparing a phase of an external clock signal (i.e., the reference signal) with a phase of an internal clock signal to determine a phase difference between the two signals, a phase jump compensator for detecting a phase jump moment by using the phase difference, for estimating a previous phase jump value according to a current phase difference upon detecting a phase jump, and for correcting the phase difference by using a phase jump correction value obtained in the estimation process, and a Low Pass Filter (LPF) for filtering a high-frequency component of the corrected phase difference. Accordingly, reliable synchronization can be achieved over an E1/T1 network.
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