发明名称 |
SYSTEMS, METHODS, AND APPARATUSES TO DECOMPOSE A SEQUENTIAL PROGRAM INTO MULTIPLE THREADS, EXECUTE SAID THREADS, AND RECONSTRUCT THE SEQUENTIAL EXECUTION |
摘要 |
Systems, methods, and apparatuses for decomposing a sequential program into multiple threads, executing these threads, and reconstructing the sequential execution of the threads are described. A plurality of data cache units (DCUs) store locally retired instructions of speculatively executed threads. A merging level cache (MLC) merges data from the lines of the DCUs. An inter-core memory coherency module (ICMC) globally retire instructions of the speculatively executed threads in the MLC. |
申请公布号 |
KR20110050725(A) |
申请公布日期 |
2011.05.16 |
申请号 |
KR20117007725 |
申请日期 |
2009.11.24 |
申请人 |
INTEL CORPORATION |
发明人 |
LATORRE FERNANDO;CODINA JOSEP M.;GIBERT ENRIC;LOPEZ PEDRO;MADRILES CARLOS;MARTINEZ ALEJANDRO;MARTINEZ RAUL;GONZALEZ ANTONIO |
分类号 |
G06F9/06;G06F9/30;G06F12/00 |
主分类号 |
G06F9/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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