| 摘要 |
An array is formed by a plurality of cells, wherein each cell is formed by a bipolar junction selection transistor having a first, a second, and a control region. The cell includes a common region, forming the second regions of the selection transistors, and a plurality of shared control regions overlying the common region. Each shared control region forms the control regions of a plurality of adjacent selection transistors and accommodates the first regions of the plurality of adjacent selection transistors as well as contact portions of the shared control region. Blocks of adjacent selection transistors of the plurality of selection transistors share a contact portion and the first regions of a block of adjacent selection transistors are arranged along the shared control region between two contact portions. A plurality of biasing structures are formed between pairs of first regions of adjacent selection transistors, for modifying a charge distribution in the shared control region below the biasing structures.
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