发明名称 STACKED DIE ASSEMBLY HAVING REDUCED STRESS ELECTRICAL INTERCONNECTS
摘要 Methods are disclosed for improving electrical interconnection in stacked die assemblies, and stacked die assemblies are disclosed having structural features formed by the methods. The resulting stacked die assemblies are characterized by having reduced electrical interconnect failure.
申请公布号 WO2011056987(A2) 申请公布日期 2011.05.12
申请号 WO2010US55472 申请日期 2010.11.04
申请人 VERTICAL CIRCUITS, INC.;MCGRATH, SCOTT;LEAL, JEFFREY, S.;SHENOY, RAVI;CANTILLEP, LORETO;MCELREA, SIMON, J.S.;PANGRLE, SUZETTE, K. 发明人 MCGRATH, SCOTT;LEAL, JEFFREY, S.;SHENOY, RAVI;CANTILLEP, LORETO;MCELREA, SIMON, J.S.;PANGRLE, SUZETTE, K.
分类号 H01L23/48;H01L23/12 主分类号 H01L23/48
代理机构 代理人
主权项
地址