发明名称 BUS CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a bus circuit which reduces bus area, suppresses increase of bus wiring capacity, and reduces power consumption when a floating state of a bus is avoided. SOLUTION: The bus circuit is provided with: a plurality of input portions to which an input signal and a control signal are input, respectively; a bus to which an output of the plurality of input parts is connected; and an output portion which has a latch circuit for holding signals using a bus signal from the bus as input. The bus circuit outputs the signal held by the latch circuit of the output portion to the bus when the bus enters the floating state. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011097271(A) 申请公布日期 2011.05.12
申请号 JP20090247939 申请日期 2009.10.28
申请人 NEC COMPUTERTECHNO LTD 发明人 AKAIKE MASAHITO
分类号 H03K19/0175 主分类号 H03K19/0175
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