| 摘要 |
INL values are determined for a plurality of sub-segments of a DAC that is adapted to accept N bit digital input codes, and a first set of correction codes that can be used to reduce to a range of INL values (to thereby improve linearity of the DAC) are determined and stored. Additionally, DNL values are determined for the plurality of sub-segments for which INL values were determined, and a second set of correction codes that can be used to ensure that all values of DNL >−1 (to thereby ensure that the DAC is monotonic) are determined and stored. This can include using one or more extra bits of resolution to remap at least some of the 2̂N possible digital input codes (that can be accepted by the DAC) to more than 2̂N possible digital output codes, to ensure that all values of DNL >−1. Such stored first and second sets are thereafter used when performing digital to analog conversions.
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