Improvements in or relating to field effect transistor devices

摘要

1,078,798. Semi-conductor devices. TELEDYNE Inc. March 23, 1966 [April 19, 1965], No. 12775/66. Heading H1K. In a method of producing an insulated gate FET, a high impurity concentration region formed on one surface of a substrate of the same conductivity type is covered with a layer of semi-conductor material of the other conductivity type into which it is then diffused, the extent of the diffusion being monitored by measuring the resistance between highly doped regions formed on the surface of the layer. The method is used to produce a pair of complementary insulated gate FETs (11, 12) by forming P+ type region (181) in a P-type wafer (20), Fig. 3 (not shown), epitaxially depositing an N-type layer (10), Fig. 4 (not shown), forming N + type source and drain regions (16a, 17a) and P+ type source and drain regions (16b, 17b) using an oxide photo-masking technique, Fig. 6 (not shown), and heating to cause region (181) to diffuse into layer (10) to form lightly doped region (18). The resistance between two probes (26, 27) applied to regions (16a, 17a) is monitored, Fig. 7 (not shown), and the diffusion is terminated when region (18) just encompasses regions (16a, 17a), indicated by a change from an ohmic characteristic (30) to a rectifying characteristic (31), Fig. 8 (not shown). Source and drain electrodes are provided and gate electrodes 13a, 13b are formed on silicon oxide layer 15, Fig. 2. Region (181) may be doped with boron introduced by heating the wafer in an impurity-containing atmosphere.