| 摘要 |
A pulse shaper comprises two binary counters, first of which comprising a clock pulses input, summarization/countdown mode, parallel loading enable input and loading data supply inputs, count mode enable input, asynchronous reset input, overflow output, an invertor, two elements OR, a circuit comprising in series connected resistor and capacitor, a start/stop device comprising a synchronous flip-flop with asynchronous reset, first and second two-input elements AND, a common point of resistor and capacitor is connected to informational input of flip-flop and to one input of first and second OR element, output of first two-input element OR is connected to flip-flop asynchronous reset input. Second input of second element AND is connected to output of second element OR , one input of which is united with overflow output of first counter, invetor input, output of which is united with synchronous reset input of first counter, Output of second element OR is connected to counters asynchronous reset inputs. Parallel loading inputs of first counter form inputs for configuration words enable, which determines duration of output pulse, clock inputs of first and second counters are connected to one another forming shaper input -input for supply of a periodic pulse sequence from output of an outer generator, clock input of flip-flop forms input for supply of actuating pulses. The shaper is also a binary comparator, an accumulating counter which has clock pulses input, compute mode enable input and asynchronous reset input. Inputs of first comparison word of comparator is connected to corresponding outputs of second counter, inputs of second comparison word of comparator forms inputs for supply second configurational word, which determines a delay for output pulse relatively to an actuating pulse supplying to clock input of the flip-flop, comparator output is connected to second input of second element OR, invertor output is connected to second input of first two-input element AND. |
