发明名称 Asynchronous set-reset circuit device
摘要 An asynchronous set-reset circuit device for testing activity performed by an Automatic Test Patterns Generation tool may include a pair of logic gates having at least two inputs each, and a logic gate structure coupled upstream from the pair of logic gates. The logic gate structure may be for driving one respective input of the pair of logic gates and may have inputs receiving a pair of test command signals. The asynchronous set-reset circuit device may also include a plurality of feedback connections between outputs of the pair of logic gates and respective inputs of the logic gate structure.
申请公布号 US7941715(B2) 申请公布日期 2011.05.10
申请号 US20070759625 申请日期 2007.06.07
申请人 STMICROELECTRONICS S.R.L. 发明人 CASARSA MARCO
分类号 G01R31/28;H03K19/00 主分类号 G01R31/28
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