发明名称 |
Clocking analog components operating in a digital system |
摘要 |
In one example, a clock generation component is configured to receive a master clock and generate a plurality of clock signals that are shifted relative to one another for a chip having an analog domain and a digital domain. A first selection component is configured to select a first one of the generated clock signals and drive the digital domain according to the first clock signal. A second selection component is configured to select a second one of the generated clock signals that is shifted relative to the first clock signal currently used to drive the digital domain for driving an analog component of the analog domain.
|
申请公布号 |
US7940202(B1) |
申请公布日期 |
2011.05.10 |
申请号 |
US20090533772 |
申请日期 |
2009.07.31 |
申请人 |
CYPRESS SEMICONDUCTOR CORPORATION |
发明人 |
KUTZ HAROLD;WILLIAMS TIMOTHY |
分类号 |
H03M1/50 |
主分类号 |
H03M1/50 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|