发明名称 MULTI BIT TEST CONTROL CIRCUIT
摘要 PURPOSE: A multi bit test control circuit is provided to use one source signal which is used to generate a control signal to eliminate an unnecessary source signal line and an unnecessary control logic, thereby making an efficient layout structure of a product. CONSTITUTION: A multi bit test control circuit comprises an operating unit, a delay unit, and a generation unit. The operation unit combines one source signal inputted to each bank with a delay signal to generate a first pulse signal. The delay unit delays the first pulse signal. The generation unit combines the output signals of the operation unit and the delay unit to generate a second pulse signal for a bank interleave multi bit test.
申请公布号 KR20110047888(A) 申请公布日期 2011.05.09
申请号 KR20090104685 申请日期 2009.10.30
申请人 发明人
分类号 G01R31/317;G11C29/00 主分类号 G01R31/317
代理机构 代理人
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