PMOS and NMOS transistors forming method, involves realizing epitaxy of silicon-germanium layer in etched portions, where etching depth of substrate and thickness of layer are such that surface levels of gates of transistors are adjusted

摘要

The method involves forming insulating wafers (42) in a silicon substrate (40), and etching an upper portion (46) of the substrate in active zones (T-P). An epitaxy of a silicon-germanium layer is realized in etched portions of the substrate. Gates of PMOS transistors are formed on the active zones, and gates of NMOS transistor are formed on other active zones (T-N). The etching depth of the substrate and the thickness of the silicon-germanium layer are such that surface levels of the gates of the transistors are adjusted in a predetermined manner. An independent claim is also included for a device comprising a silicon substrate.