发明名称 CONSTANT VOLTAGE GENERATION CIRCUIT, AND SEMICONDUCTOR INTEGRATED CIRCUIT WITH THE BUILT-IN CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce the fluctuation of an output voltage in a non-sampling period even if a load capacity is large, in a sampling-driven constant voltage generation circuit. SOLUTION: This constant voltage generation circuit includes: a differential amplifying circuit to which a supply voltage is supplied from first and second power supply potential through first and second switch circuits, and from which an output signal is output; a third switch circuit having a first terminal connected to an output terminal of the differential amplifying circuit; a first capacitor connected between a second terminal of the third switch circuit and the second power supply potential; an amplifying circuit for amplifying an output signal supplied from the second terminal of the third switch circuit and supplying it to an output node during the on-state of the third switch circuit, and amplifying potential held by the first capacitor and supplying it to the output node during the off-state of the third switch circuit; and a second capacitor connected between the output node and the output terminal of the differential amplifying circuit. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011090363(A) 申请公布日期 2011.05.06
申请号 JP20090241127 申请日期 2009.10.20
申请人 SEIKO EPSON CORP 发明人 KADOWAKI TADAO
分类号 G05F3/24;H03F3/45;H03K19/00 主分类号 G05F3/24
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