发明名称 |
Extended Cache Capacity |
摘要 |
A method, programmed medium and system are provided for enabling a core's cache capacity to be increased by using the caches of the disabled or non-enabled cores on the same chip. Caches of disabled or non-enabled cores on a chip are made accessible to store cachelines for those chip cores that have been enabled, thereby extending cache capacity of enabled cores.
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申请公布号 |
US2011107031(A1) |
申请公布日期 |
2011.05.05 |
申请号 |
US20090612767 |
申请日期 |
2009.11.05 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ANAND VAIJAYANTHIMALA K.;FLEMMING DIANE GARZA;MARON WILLIAM A.;SRINIVAS MYSORE SATHYANARAYANA |
分类号 |
G06F12/08;G06F9/44;G06F12/00 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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