发明名称 Interfacing between differing voltage level requirements in an integrated circuit system
摘要 A method includes controllably generating a first bias voltage from a supply voltage to be within an upper tolerable limit of an operating voltage of one or more constituent active circuit element(s) of an Input/Output (IO) core device of an integrated circuit (IC) to be interfaced with an IO pad, and controllably generating a second bias voltage from an external voltage supplied through the IO pad to be within the upper tolerable limit of the operating voltage of the one or more constituent active circuit element(s) of the IO core device to be interfaced with the IO pad. The method also includes controllably utilizing a control signal generated by the IO core to derive an output bias voltage from the first bias voltage during a driver mode of operation or the second bias voltage during a failsafe mode of operation and a tolerant mode of operation.
申请公布号 US2011102046(A1) 申请公布日期 2011.05.05
申请号 US20090610277 申请日期 2009.10.31
申请人 KUMAR PANKAJ;PARAMESWARAN PRAMOD ELAMANNU;KOTHANDARAMAN MAKESHWAR;DESHPANDE VANI;KRIZ JOHN 发明人 KUMAR PANKAJ;PARAMESWARAN PRAMOD ELAMANNU;KOTHANDARAMAN MAKESHWAR;DESHPANDE VANI;KRIZ JOHN
分类号 H03L5/00 主分类号 H03L5/00
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