发明名称 |
BURIED BIT LINE PROCESS AND SCHEME |
摘要 |
The embodiment provides a buried bit line process and scheme. The buried bit line is disposed in a trench formed in a substrate. The buried bit line includes a diffusion region formed in a portion of the substrate adjacent the trench. A blocking layer is formed on a portion sidewall of the trench. A conductive plug is formed in the trench, covering sidewalls of the diffusion region and the blocking layer.
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申请公布号 |
US2011101435(A1) |
申请公布日期 |
2011.05.05 |
申请号 |
US20100940207 |
申请日期 |
2010.11.05 |
申请人 |
TAIWAN MEMORY CORPORATION |
发明人 |
JUNG LE-TIEN;LIN YUNG-CHANG |
分类号 |
H01L29/94;H01L21/334 |
主分类号 |
H01L29/94 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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