发明名称 METHOD AND LEADFRAME FOR PACKAGING INTEGRATED CIRCUITS
摘要 A leadframe suitable for use in the packaging of at least two integrated circuit dice into a single integrated circuit package is described. The leadframe includes a plurality of leads. Each of a first set of the plurality of leads has a first side and a second side substantially opposite the first side of the lead. Additionally, each of the first and second sides of the first set of leads each include at least two solder pads. Each solder pad on a lead of the first set of leads is isolated from other solder pads on the same side of the lead with at least one recessed region adjacent the solder pad. In various embodiments, I/O pads from at least two dice are physically and electrically connected to the opposing sides of the leads.
申请公布号 US2011104854(A1) 申请公布日期 2011.05.05
申请号 US201113004639 申请日期 2011.01.11
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 WONG WILL K.;TU NGHIA T.;BAYAN JAIME A.
分类号 H01L21/56;H01L21/60 主分类号 H01L21/56
代理机构 代理人
主权项
地址
您可能感兴趣的专利