| 摘要 |
A processor 100 has an instruction cache 101 and a trace cache 102. The trace cache includes pointers to commonly used blocks of instructions. The commonly used blocks may be identified using a signal 112. The processor uses a multiplexer 103, 104 to select instructions from the trace cache or the instruction cache to be executed in the execution engine 106. The trace cache may be divided into separate pointer and block sections. The processor may use a thread filter 107 to trace only threads specified by a thread selection signal 110. The signal may be sent by a user or by the operating system based on the resource usage of the threads. The trace cache may be disabled to save energy in response to an energy mode signal 111. |
