发明名称 Bias voltage generation to protect input/output (IO) circuits during a failsafe operation and a tolerant operation
摘要 <p>A method includes controllably generating a first bias voltage (206) from a supply voltage to be within an upper tolerable limit of an operating voltage of one or more constituent active circuit element(s) of an Input/Output (IO) core device of an integrated circuit (IC) to be interfaced with an IO pad (304), and controllably generating a second bias voltage (208) from an external voltage supplied through the IO pad (304) to be within the upper tolerable limit of the operating voltage of the one or more constituent active circuit element(s) of the IO core device to be interfaced with the IO pad. The method also includes controllably utilizing a control signal (204) generated by the IO core to derive an output bias voltage (210) from the first bias voltage (206) during a driver mode of operation or the second bias voltage (208) during a failsafe mode of operation and a tolerant mode of operation.</p>
申请公布号 EP2317651(A1) 申请公布日期 2011.05.04
申请号 EP20100152680 申请日期 2010.02.04
申请人 LSI CORPORATION 发明人 KUMAR, PUNKAJ;PARAMESWARAN, PRAMOD ELAMANNU;KOTHANDARAMAN, MAKESHWAR;DESHPANDE, VANI;KRIZ, JOHN
分类号 H03K19/003 主分类号 H03K19/003
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