发明名称 Apparatus and methods for adjusting performance of programmable logic devices
摘要 A programmable logic device (PLD) includes at least two regions. Each region includes electrical circuitry that has a set of transistors. Each of the two regions has a corresponding fixed transistor threshold voltage, a corresponding fixed transistor body bias, and a corresponding fixed supply voltage.
申请公布号 US7936184(B2) 申请公布日期 2011.05.03
申请号 US20060361642 申请日期 2006.02.24
申请人 ALTERA CORPORATION 发明人 LEE ANDY L.;LANE CHRISTOPHER F.;ZAVERI KETAN H.;CLIFF RICHARD G.;MCCLINTOCK CAMERON R.;REDDY SRINIVAS T.;LEWIS DAVID
分类号 H01L25/00 主分类号 H01L25/00
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