发明名称 |
On-chip interconnect-stack cooling using sacrificial interconnect segments |
摘要 |
The present invention relates to an integrated-circuit device and to a method for fabricating an integrated-circuit device with an integrated fluidic-cooling channel. The method comprises forming recesses in a dielectric layer sequence at desired lateral positions of electrical interconnect segments and at desired lateral positions of fluidic-cooling channel segments. A metal filling is deposited in the recesses of the dielectric layer sequence so as to form the electrical interconnect segments and to form a sacrificial filling in the fluidic-cooling channel segments. Afterwards, the sacrificial metal filling is selectively removed from the fluidic-cooling channel segments.
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申请公布号 |
US7936563(B2) |
申请公布日期 |
2011.05.03 |
申请号 |
US20060158989 |
申请日期 |
2006.12.19 |
申请人 |
NXP B.V. |
发明人 |
GOSSET LAURENT;ARNAL VINCENT |
分类号 |
H05K7/20;H01L21/764;H01L23/367 |
主分类号 |
H05K7/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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