发明名称 Low gate count sequential multitap correlator
摘要 A system and method of achieving a reduced time for first fix in a global positioning system receiver (GPS). The GPS receiver includes a low gate count sequential multitap correlator (102) in combination with a digital signal processor (106) and a down converter (101). The low gate count sequential multitap correlator (102) conducts sequential correlation on the incoming GPS signals using a multitapping and pipelining scheme. The multitapping process involves tapping the shift register and simultaneously correlating the signal samples and tapped chips. The pipelining process includes sampling data, mapping incoming samples, shifting carrier acquisition code, multiplying and accumulating the code and signal products. The digital signal processor conducts the frequency search.
申请公布号 US7936846(B2) 申请公布日期 2011.05.03
申请号 US20040628707 申请日期 2004.07.05
申请人 ACCORD SOFTWARE & SYSTEMS PVT. LTD. 发明人 SRIKANTIAH MURALIKRISHNA;SHIVARAMAIAH NAGARAJ CHANNARAYAPATNA
分类号 H04L27/06;H04B1/00;H04B1/707;H04B7/185;H04H20/74 主分类号 H04L27/06
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