发明名称 Digital/analog converter circuit
摘要 A selection section (105) selects a step voltage, among a plurality of step voltages (SV1, SV2, SV3, . . . ) each having a voltage value changing stepwise, corresponding to the digital value of digital data (D-DATA). For each of the plurality of step voltages (SV1, SV2, SV3, . . . ), different digital values are allocated to different steps of the step voltage. An amplifier section (106) amplifies the step voltage selected by the selection section (105). An output section (107) outputs the step voltage amplified by the amplifier section (106) as an output voltage (Vout) for a time period corresponding to the digital value of the digital data (D-DATA).
申请公布号 US7936295(B2) 申请公布日期 2011.05.03
申请号 US20070376400 申请日期 2007.06.19
申请人 PANASONIC CORPORATION 发明人 TOKUNAGA YUSUKE;SAKIYAMA SHIRO;DOSHO SHIRO;DOI YASUYUKI;NAKAYAMA KURUMI
分类号 H03M1/78 主分类号 H03M1/78
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