发明名称 Backend interconnect scheme with middle dielectric layer having improved strength
摘要 An integrated circuit structure includes a first, a second and a third metallization layer. The first metallization layer includes a first dielectric layer having a first k value; and first metal lines in the first dielectric layer. The second metallization layer is over the first metallization layer, and includes a second dielectric layer having a second k value greater than the first k value; and second metal lines in the second dielectric layer. The third metallization layer is over the second metallization layer, and includes a third dielectric layer having a third k value; and third metal lines in the third dielectric layer. The integrated circuit structure further includes a bottom passivation layer over the third metallization layer.
申请公布号 US7936067(B2) 申请公布日期 2011.05.03
申请号 US20080121541 申请日期 2008.05.15
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 TSAI HAO-YI;LIU YU-WEN;CHEN HSIEN-WEI;CHEN YING-JU;JENG SHIN-PUU
分类号 H01L23/48;H01L23/52;H01L29/40 主分类号 H01L23/48
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