发明名称 Wiring structure and wiring designing method
摘要 A designing method of a semiconductor device having a first wire and a second wire with a plurality of vias includes determining a first life time change rate of the semiconductor device in response to a change in a number of via column, a second life time change rate of the semiconductor device in response to a change in a number of via row, reducing the number of via column according to a ratio based on the first life time change and the second life time change; and increasing the number of via row at least one.
申请公布号 US7935630(B2) 申请公布日期 2011.05.03
申请号 US20080972944 申请日期 2008.01.11
申请人 FUJITSU SEMICONDUCTOR LIMITED 发明人 SATO MOTONOBU
分类号 H01L21/44 主分类号 H01L21/44
代理机构 代理人
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