发明名称 SEMICONDUCTOR MEMORY DEVICE REDUCING RESISTANCE FLUCTUATION OF DATA TRANSFER LINE
摘要 According to one embodiment, a semiconductor memory device includes first and second memory cell blocks and an interconnect rerouting unit provided therebetween. The first memory cell block includes first interconnects and second interconnects provided in each space between the first interconnects. The second memory cell block includes a plurality of third interconnects provided on lines extending from the first interconnects and a plurality of fourth interconnects provided on lines extending from the second interconnects. A width and a thickness of the second and fourth interconnects are smaller than a width and a thickness of the first and second interconnects. Each of the first to fourth interconnects is connected to one end of first to fourth cell units including memory cells. The interconnect rerouting unit connects one of the fourth interconnects to one of the first interconnects and connects one of the third interconnects to the second interconnects.
申请公布号 US2011096600(A1) 申请公布日期 2011.04.28
申请号 US20100877563 申请日期 2010.09.08
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NOGUCHI MITSUHIRO
分类号 G11C16/04 主分类号 G11C16/04
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