发明名称 |
METHOD OF MEASURING DELAY IN AN INTEGRATED CIRCUIT |
摘要 |
A method of measuring signal delay in a integrated circuit comprising applying a common clock signal at a circuit input and output, applying a test signal at the circuit input, detecting a corresponding output signal at the circuit output and detecting whether the test signal and output signal occur in a common part of the clock signal.
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申请公布号 |
US2011095768(A1) |
申请公布日期 |
2011.04.28 |
申请号 |
US20080747650 |
申请日期 |
2008.12.10 |
申请人 |
CHEUNG PETER YING KAY;SEDCOLE NICHOLAS PETER;WONG JUSTIN SUNG |
发明人 |
CHEUNG PETER YING KAY;SEDCOLE NICHOLAS PETER;WONG JUSTIN SUNG |
分类号 |
G01R27/28;G06F17/50 |
主分类号 |
G01R27/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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