<p>An improved fast settling bit slicing comparator circuit includes a comparator having a non-inverting and inverting input; the non-inverting input receiving an input signal; a filter circuit for receiving the input signal and being connected with the inverting input of the comparator; a positive feedback circuit interconnected between the output of the comparator and the non-inverting input of the comparator for introducing a predetermined hysteresis offset; the filter circuit including a filter resistance and filter capacitance having a reduced time constant sufficient to compensate for at least a portion of the hysteresis offset. Additionally, the positive feedback circuit may be interconnected with the inverting input of the comparator through the filter circuit for gradually reducing the effect of the hysteresis offset by reducing the differential voltage between the inverting and non-inverting inputs.</p>
申请公布号
WO2011049597(A2)
申请公布日期
2011.04.28
申请号
WO2010US02417
申请日期
2010.09.02
申请人
LOJACK OPERATING COMPANY, LP;FEDAN, OREST;BOURQUE, STEPHEN