| 摘要 |
<p>A parity control system wherein at a transmitting end, an information part to be transmitted is modulation encoded and thereafter error correction encoded, thereby generating a parity, and at a receiving end, a received sequence, which includes the information part and the parity, is error correction decoded and modulation decoded. At the transmitting end, a header is added to the information part, which has been modulation encoded, thereby forming an information block to be input to the error correction encoding process. The information block is then input to the error correction encoding process, thereby generating the parity. The value of the header is then used to control the bit pattern of the parity.</p> |
