| 摘要 |
PROBLEM TO BE SOLVED: To provide a debugging device reproducing execution timing inside a processor even if the processor stops due to a break point or the like and executes again irrespective of intervention of a debugger and reproducing execution timing of clock precision with reduced number of attached hardware. SOLUTION: The information of pipeline interlocking occurring during execution in user mode is stored and held in a storage element (112) when switching from the user mode into debug mode, a multiplexor (113) outputs the values stored and held in the storage element (112) for a predetermined period of time when switching from the debug mode into the user mode, and a pipeline stall is reproduced when returning to the user mode when the storage element (112) stores and holds the information of pipeline interlocking. COPYRIGHT: (C)2011,JPO&INPIT
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