| 摘要 |
The invention provides a method of manufacturing a semiconductor device having a MOS transistor, a resistor element, etc on one semiconductor substrate, in which the number of masks and the number of manufacturing steps are decreased. In an NMOS formation region, a channel stopper layer is formed in a P type well by a first ion implantation process. Then a punch-through prevention layer is formed in the P type well by a second ion implantation process. On the other hand, in a first high resistor element formation region and a second high resistor element formation region, utilizing the first and second ion implantation processes, a resistor layer is formed in an N type well. |
