发明名称 VIA FORMING METHOD AND METHOD OF MANUFACTURING MULTI-CHIP PACKAGE USING THE SAME
摘要 A via forming method is provided. The via forming method includes: forming via-holes in a substrate; putting the substrate having the via-holes in a first solution to fill the via-holes with the first solution; sinking the metal particles into the via-holes by supplying a second solution containing metal particles to the first solution, in which there is the substrate; and performing a first curing process of heat-treating the substrate having the via-holes filled with the metal particles so as to form vias in the via-holes. Further, a method of manufacturing a multi-chip package using the via forming method is provided.
申请公布号 US2011097853(A1) 申请公布日期 2011.04.28
申请号 US20100835289 申请日期 2010.07.13
申请人 ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 KIM DONG PYO;BAEK KYU HA;PARK KUN SIK;DO LEE MI
分类号 H01L21/768;H01L21/50 主分类号 H01L21/768
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