发明名称 SYSTEM AND METHOD FOR HARDWARE ACCELERATION OF A SOFTWARE TRANSACTIONAL MEMORY
摘要 In a transactional memory technique, hardware serves simply to optimize the performance of transactions that are controlled fundamentally by software. The hardware support reduces the overhead of common TM tasks—conflict detection, validation, and data isolation—for common-case bounded transactions. Software control preserves policy flexibility and supports transactions unbounded in space and in time. The hardware includes 1) an alert-on-update mechanism for fast software-controlled conflict detection; and 2) programmable data isolation, allowing potentially conflicting readers and writers to proceed concurrently under software control.
申请公布号 US2011099335(A1) 申请公布日期 2011.04.28
申请号 US20100912285 申请日期 2010.10.26
申请人 UNIVERSITY OF ROCHESTER 发明人 SCOTT MICHAEL L.;DWARKADAS SANDHYA;SHRIRAMAN ARRVINDH;MARATHE VIRENDRA;SPEAR MICHAEL F.
分类号 G06F12/08 主分类号 G06F12/08
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