发明名称 SENSE AMPLIFIER CIRCUIT TO ENABLE SPEEDING-UP OF READOUT OF INFORMATION FROM MEMORY CELLS
摘要 A sense amplifier circuit, which is connected to a bit line and to an inverted bit line to which a voltage, inverted alternatively from a high level or a low level of a voltage applied to the bit line, is applied, includes a first resistance section reducing a voltage output from a memory cell through the inverted bit line, a second resistance section reducing a voltage output from a memory cell through the bit line, and an amplification section amplifying the first voltage reduced by the first resistance section and amplifying the second voltage reduced by the second resistance section.
申请公布号 US2011096616(A1) 申请公布日期 2011.04.28
申请号 US20100904337 申请日期 2010.10.14
申请人 ELPIDA MEMORY, INC. 发明人 KUBOUCHI SHUICHI;RIHO YOSHIRO
分类号 G11C7/06;H03L5/00 主分类号 G11C7/06
代理机构 代理人
主权项
地址
您可能感兴趣的专利