发明名称 METHOD TO ATTAIN LOW DEFECTIVITY FULLY SILICIDED GATES
摘要 A method of forming fully silicided (FUSI) gates in MOS transistors which is compatible with wet etch processes used in source/drain silicide formation is disclosed. The gate silicide formation step produces a top layer of metal rich silicide which is resistant to removal in wet etch processes. A blocking layer over active areas prevents source/drain silicide formation during gate silicide formation. Wet etches during removal of the blocking layer and source/drain metal strip do not remove the metal rich gate silicide layer. Anneal of the gate silicide to produce a FUSI gate with a desired stoichiometry is delayed until after formation of the source/drain silicide. The disclosed method is compatible with nickel and nickel-platinum silicide processes.
申请公布号 US2011097884(A1) 申请公布日期 2011.04.28
申请号 US20090537336 申请日期 2009.08.07
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 VISOKAY MARK ROBERT;MEHRAD FREIDOON;GULDI RICHARD L.;OBENG YAW SAMUEL
分类号 H01L21/28 主分类号 H01L21/28
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