| 摘要 |
The duty ratio of a PWM signal is prevented from being zero immediately after the start of PWM control, for example. A PWM limiter circuit has a structure with which a signal output from the PWM limiter circuit can be prevented from being higher than a certain value or lower than a certain value. The PWM limiter circuit includes a comparator circuit, a controller circuit, and a switch circuit. The highest duty ratio reference voltage VrefH is input to a first input terminal. The lowest duty ratio reference voltage VrefL is input to a second input terminal. Voltage Verr output from an error amplifier is input to a third input terminal.
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