| 摘要 |
There is provided a digitally controlled oscillator, which is capable of widening its operation range with maintaining its resolution and the maximum frequency at which it operates. The digitally controlled oscillator includes a phase compensation block, a coarse block, and a fine block. The phase compensation block 510 generating a PLL signal PLLCLK and a first clock signal CLK1 which has the same phase and frequency as the PLL signal, in response to a phase control signal DISABLE and a fourth clock signal CLK4. The coarse block 520 generating a second clock signal CLK2 and a third clock signal CLK3 which results from delaying the PLL signal PLLCLK and the first clock signal CLK1 for a given time, in response to a m(integer)-bit coarse A control signal COAR_A and an (m−1)-bit coarse B control signal COAR_B. The fine block generating the fourth clock signal CLK4 by applying interpolation to the second clock signal CLK2 and the third clock signal CLK3 in response to an n(integer)-bit first fine control signal FCB and a n-bit second fine control signal FC.
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