发明名称 |
Method for manufacturing a stacked semiconductor package, and stacked semiconductor package |
摘要 |
A method for manufacturing a stacked semiconductor package where a plurality of semiconductor chips are stacked on a substrate, including: forming insulating layers at portions of a wafer corresponding to sides of the plurality of semiconductor chips when the plurality of semiconductor chips are in the wafer; processing the wafer so as to obtain the plurality of semiconductor chips; subsequently stacking the plurality of semiconductor chips on the substrate such that the insulating layers formed at the sides of the plurality of semiconductor chips are respectively positioned at the same side as one another; and forming a wiring over the insulating layers formed at the sides of the plurality of semiconductor chips so that the plurality of semiconductor chips are electrically connected with one another and one or more of the plurality of semiconductor chips are electrically connected with the substrate.
|
申请公布号 |
US7932162(B2) |
申请公布日期 |
2011.04.26 |
申请号 |
US20080249025 |
申请日期 |
2008.10.10 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
SAGARA JUNYA;TAKYU SHINYA;KUROSAWA TETSUYA |
分类号 |
H01L21/30 |
主分类号 |
H01L21/30 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|