发明名称 |
RESONANT CLOCK DISTRIBUTION NETWORK ARCHITECTURE FOR TRACKING PARAMETER VARIATIONS IN CONVENTIONAL CLOCK DISTRIBUTION NETWORKS |
摘要 |
A resonant clock distribution network architecture is proposed that enables a resonant clock network to track the impact of parameter variations on the insertion delay of a conventional clock distribution network, thus limiting clock skew between the two networks and yielding increased performance. Such a network is generally applicable to semiconductor devices with various clock frequencies, and high-performance and low-power clocking requirements such as microprocessors, ASICs, and SOCs. |
申请公布号 |
WO2011046987(A2) |
申请公布日期 |
2011.04.21 |
申请号 |
WO2010US52405 |
申请日期 |
2010.10.12 |
申请人 |
CYCLOS SEMICONDUCTOR, INC.;PAPAEFTHYMIOU, MARIOS C.;ISHII, ALEXANDER |
发明人 |
PAPAEFTHYMIOU, MARIOS C.;ISHII, ALEXANDER |
分类号 |
G06F1/04;G06F1/06;G06F1/08 |
主分类号 |
G06F1/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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