发明名称 MULTI-MODE MEMORY DEVICE AND METHOD
摘要 Memory device systems, systems and methods are disclosed, such as those involving a plurality of stacked memory device dice and a logic die connected to each other through a plurality of conductors. The logic die serves, for example, as a memory interface device to a memory access device, such as a processor. The logic die can include a command register that allows selective operation in either of two modes. In a direct mode, conventional command signals as well as row and column address signals are applied to the logic die, and the logic die can essentially couple these signals directly to the memory device dice. In an indirect mode, a packet containing a command and a composite address are applied to the logic die, and the logic die can decode the command and composite address to apply conventional command signals as well as row and column address signals to the memory device dice.
申请公布号 EP2311039(A2) 申请公布日期 2011.04.20
申请号 EP20090774012 申请日期 2009.06.10
申请人 MICRON TECHNOLOGY, INC. 发明人 JEDDELOH, JOSEPH, M.
分类号 G11C5/02;G06F13/00;G11C11/408;G11C11/4093;G11C11/4096 主分类号 G11C5/02
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