发明名称 WIRING SUBSTRATE FOR A SEMICONDUCTOR CHIP, SEMICONDUCTOR PACKAGE HAVING THE WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
摘要 PURPOSE: A wiring substrate for a semiconductor chip, a semiconductor package having a wiring substrate and a method of manufacturing the semiconductor package are provided to prevent the interference between adjacent bonding wires by connecting the bonding wires to first and second bonding pads. CONSTITUTION: In a wiring substrate for a semiconductor chip, a semiconductor package having a wiring substrate and a method of manufacturing the semiconductor package, a substrate(110) comprises a first side(112) and a second side(114). A windows(180), exposing the chip pad of a semiconductor chip, is formed on the substrate. First and second wiring layers(132,162) are laminated while having at least one insulating layer(122). The first and second bonding pad are connected to the first and second wiring layers respectively and are arranged on one side of the window into an uneven structure.
申请公布号 KR20110039855(A) 申请公布日期 2011.04.20
申请号 KR20090096884 申请日期 2009.10.12
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 YOON, TAE SUNG
分类号 H01L23/12;H01L23/48 主分类号 H01L23/12
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