| 摘要 |
PURPOSE: A high impedance bias network is provided to compensate the parasitic diode joint portion of anti-parallel diode pair by connecting a third diode between a power node and a signal node. CONSTITUTION: A bias circuit network(100) includes anti-parallel diode pair(105), and the anti-parallel diode pair includes a first diode(101) and a second diode(102). An anode(110) of the second diode is connected to a cathode(112) of the first diode, and a cathode(111) of the second diode is connected to the anode of the first diode. The bias circuit network provides high impedance, and biases the input signal of a system(10). The input signal is transferred to a first terminal(107) of the bias circuit network, and common mode voltage(108) is provided to a second terminal(109) of the bias circuit network. |
