发明名称 Zwischenspeichersteuervorrichtung, Informationsverarbeitungsvorrichtung und Zwischenspeichersteuerungsverfahren
摘要 <p>A cache control apparatus determines whether to adopt or not data acquired by a speculative fetch by monitoring a status of the speculative fetch which is a memory fetch request output before it becomes clear whether data requested by a CPU is stored in a cache of the CPU and time period obtained by adding up the time period from when the speculative fetch is output to when the speculative fetch reaches a memory controller and time period from completion of writing of data to a memory which is specified by a data write command that has been issued, before issuance of the speculative fetch, for the same address as that for which the speculative fetch is issued to when a response of the data write command is returned.</p>
申请公布号 DE602008005261(D1) 申请公布日期 2011.04.14
申请号 DE20086005261T 申请日期 2008.10.21
申请人 FUJITSU LTD. 发明人 IWASAKI, SHINICHI
分类号 G06F12/08 主分类号 G06F12/08
代理机构 代理人
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