发明名称 ARITHMETIC PROCESSING UNIT, SEMICONDUCTOR INTEGRATED CIRCUIT, AND ARITHMETIC PROCESSING METHOD
摘要 PROBLEM TO BE SOLVED: To achieve high throughput by preventing the stall of an arithmetic apparatus. SOLUTION: An arithmetic processing apparatus includes the arithmetic apparatus 11; a first memory 12 for temporarily storing data to be processed in the arithmetic apparatus; first paths 42, 32 and 15 for pre-loading the data from a second memory 50 to the first memory with a pre-loader, and second paths 14, 31 and 41 allowing the arithmetic apparatus access the second memory. The memory access between the first memory and the second memory using the first paths and the second paths is arbitrated by a memory controller 40, and the memory controller is controlled by a scheduler 60. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011076232(A) 申请公布日期 2011.04.14
申请号 JP20090224909 申请日期 2009.09.29
申请人 FUJITSU LTD 发明人 YAMAUCHI HIROMASA;YAMASHITA KOICHIRO
分类号 G06F9/38 主分类号 G06F9/38
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