发明名称 3D INTEGRATED CIRCUIT LAYER INTERCONNECT
摘要 A three-dimensional 3D interconnect structure with a small footprint is described, useful for connection from above to levels of circuit structures in a multi-level device. Also, an efficient and low cost method for manufacturing the 3D interconnect structure is provided.
申请公布号 US2011084397(A1) 申请公布日期 2011.04.14
申请号 US20090579192 申请日期 2009.10.14
申请人 MACRONIX INTERNATIONAL CO., LTD. 发明人 LUNG HSIANG-LAN
分类号 H01L23/535;H01L21/768 主分类号 H01L23/535
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