| 摘要 |
A technique realizes execution of various combinations of arithmetic operations in, for example SIMD floating-point multiply-add arithmetic operation, with less instruction kind codes. An arithmetic operating apparatus (1) includes a setting unit (20) that sets in one or more unused bits of a single instruction extended instruction information to instruct at least one of a register (11) and arithmetic operators (12b, 12e) to perform an extended process different from an ordinary process. |
