发明名称 |
ARCHITECTURE FOR SINGLE-STEPPING IN RESONANT CLOCK DISTRIBUTION NETWORKS |
摘要 |
A resonant clock distribution network architecture is proposed that is capable of single-step operation through the use of selective control in the resonant clock drivers and the deployment of flip-flops that require the clock to remain stable for a sufficiently long time between any two consecutive state updates. Such a network is generally applicable to semiconductor devices with various clock frequencies, and high-performance and low-power clocking requirements such as microprocessors, ASICs, and SOCs.
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申请公布号 |
US2011084773(A1) |
申请公布日期 |
2011.04.14 |
申请号 |
US20100903172 |
申请日期 |
2010.10.12 |
申请人 |
CYCLOS SEMICONDUCTOR, INC. |
发明人 |
PAPAEFTHYMIOU MARIOS C.;ISHII ALEXANDER |
分类号 |
H03B5/12 |
主分类号 |
H03B5/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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