发明名称 |
OUTPUT ENABLE SIGNAL GENERATING CIRCUIT AND METHOD OF SEMICONDUCTOR MEMORY APPARATUS |
摘要 |
An output enable signal generating circuit for a semiconductor memory apparatus includes an output control unit configured to receive CAS latency information and to generate an output control signal having enable timing according to a DLL on/off mode, and an output enable signal output unit configured to receive the output control signal and to output an output enable signal in response to a read command and a DLL clock signal.
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申请公布号 |
US2011085395(A1) |
申请公布日期 |
2011.04.14 |
申请号 |
US20100970541 |
申请日期 |
2010.12.16 |
申请人 |
HYNIX SEMICONDUCTOR, INC. |
发明人 |
LEE HYENG OUK |
分类号 |
G11C7/00 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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