发明名称 APPARATUS, METHOD AND PROGRAM FOR RATE ADJUSTMENT
摘要 PROBLEM TO BE SOLVED: To accelerate rate adjustment while suppressing an increase in processing amount and in a circuit area. SOLUTION: A fundamental parameter calculation unit 121 calculates a fundamental parameter used for rate matching processing. A leading parameter calculation unit 122 sequentially calculates a leading decision value E(i) of an i-th block using a recurrence formula. A block divider 123 divides encoded data into a plurality of blocks. Bit processing units 124-0 to 124-n determine a bit subjected to puncturing or repetition using an increment value and a decrement value calculated by the fundamental parameter calculation unit 121 and the leading decision value E(i) by block calculated by the leading parameter calculation unit 122. A block coupling unit 125 couples the blocks punctured or repeated by the bit processing units 124-0 to 124-n and outputs the coupled blocks as adjustment data having a rate adjusted. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011077943(A) 申请公布日期 2011.04.14
申请号 JP20090228844 申请日期 2009.09.30
申请人 FUJITSU LTD 发明人 SEYAMA TAKASHI
分类号 H03M13/23;H03M13/35;H04L29/08 主分类号 H03M13/23
代理机构 代理人
主权项
地址
您可能感兴趣的专利